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rail-to-rail, high output current amplifier ad8397 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2011 analog devices, inc. all rights reserved. features dual operational amplifier voltage feedback wide supply range from 3 v to 24 v rail-to-rail output output swing to within 0.5 v of supply rails high linear output current 310 ma peak into 32 on 12 v supplies while maintaining ?80 dbc sfdr low noise 4.5 nv/hz voltage noise density at 100 khz 1.5 pa/hz current noise density at 100 khz high speed 69 mhz bandwidth (g = 1, ?3 db) 53 v/s slew rate (r load = 25 ) applications twisted-pair line drivers audio applications general-purpose ac applications general description the ad8397 comprises two voltage feedback operational amplifiers capable of driving heavy loads with excellent linearity. the common-emitter, rail-to-rail output stage surpasses the output voltage capability of typical emitter-follower output stages and can swing to within 0.5 v of either rail while driving a 25 load. the low distortion, high output current, and wide output dynamic range make the ad8397 ideal for applications that require a large signal swing into a heavy load. fabricated with analog devices, inc., high speed extra fast complementary bipolar high voltage (xfcb-hv) process, the high bandwidth and fast slew rate of the ad8397 keep distortion to a minimum. the ad8397 is available in a standard 8-lead soic_n package and, for higher power dissipating applications, a thermally enhanced 8-lead soic_n_ep package. both packages can operate from ?40c to +85c. pin configuration out1 1 ?in1 2 +in1 3 ?v s 4 +v s out2 ?in2 +in2 8 7 6 5 05069-001 figure 1. 8-lead soic 1.50 ?1.50 ?1.25 ?1.00 ?0.75 ?0.50 ?0.25 0 0.25 0.50 0.75 1.00 1.25 0 2 4 6 8 101214161820 05069-031 time (s) v out (v) figure 2. output swing, v s = 1.5 v, r l = 25 12 ?12 ?9 ?6 ?3 0 3 6 9 0 2 4 6 8 101214161820 05069-032 time (s) v out (v) figure 3. output swing, v s = 12 v, r l = 100
ad8397 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 ? applications....................................................................................... 1 ? general description ......................................................................... 1 ? pin configuration............................................................................. 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? absolute maximum ratings............................................................ 7 ? maximum power dissipation ..................................................... 7 ? esd caution.................................................................................. 7 ? typical performance characteristics ..............................................8 ? applications information .............................................................. 11 ? power supply and decoupling.................................................. 11 ? layout considerations............................................................... 11 ? unity-gain output swing ......................................................... 11 ? capacitive load drive ............................................................... 12 ? outline dimensions ....................................................................... 13 ? ordering guide .......................................................................... 13 ? revision history 5/11rev. 0 to rev. a changes to applications section and general description section................................................................................................ 1 changed maximum output current parameter to peak ac output current parameter, table 1................................................ 3 added note 1 and note 2, table 1.................................................. 3 changed maximum output current parameter to peak ac output current parameter, table 2................................................ 4 added note 1 and note 2, table 2.................................................. 4 changed maximum output current parameter to peak ac output current parameter, table 3................................................ 5 added note 1 and note 2, table 3.................................................. 5 changed maximum output current parameter to peak ac output current parameter, table 4................................................ 6 added note 1 and note 2, table 4.................................................. 6 changes to figure 4.......................................................................... 7 changed general description section to applications information section ....................................................................... 11 updated outline dimensions ....................................................... 13 1/05revision 0: initial version
ad8397 rev. a | page 3 of 16 specifications v s = 1.5 v or +3 v (at t a = 25c, g = +1, r l = 25 , unless otherwise noted) 1 . table 1. parameter test conditions/comments min typ max unit dynamic performance ?3 db bandwidth v out = 0.1 v p-p 50 mhz 0.1 db flatness v out = 0.1 v p-p 3.6 mhz large signal bandwidth v out = 2.0 v p-p 9 mhz slew rate v out = 0.8 v p-p 32 v/s noise/distortion performance distortion (worst harmonic) f c = 100 khz, v out = 1.4 v p-p, g = +2 ?90 dbc input voltage noise f = 100 khz 4.5 nv/hz input current noise f = 100 khz 1.5 pa/hz dc performance input offset voltage 1.0 2.5 mv t min ? t max 2.5 mv input offset voltage match 1.0 2.0 mv input bias current 200 900 na t min ? t max 1.3 a input offset current 50 300 na open-loop gain v out = 0.5 v 81 88 db input characteristics input resistance f = 100 khz 87 k input capacitance 1.4 pf common-mode rejection v cm = 1 v ?71 ?80 db output characteristics output resistance 0.2 +swing r load = 25 +1.39 +1.43 v p ?swing r load = 25 ?1.4 ?1.37 v p +swing r load = 100 +1.45 +1.48 v p ?swing r load = 100 ?1.47 ?1.44 v p peak ac output current 2 sfdr ?70 dbc, f = 100 khz, v out = 0.7 v p , r load = 4.1 170 ma power supply operating range (dual supply) 1.5 12.0 v supply current 6 7 8.5 ma/amp power supply rejection v s = 0.5 v ?70 ?82 db 1 unity gain used to facilitate characterization. to imp rove stability, a gain of 2 or greater is recommended. 2 peak ac output current specificatio n assumes normal ac operation and is not valid for continuous dc operation.
ad8397 rev. a | page 4 of 16 v s = 2.5v or +5 v (at t a = 25c, g = +1, r l = 25 , unless otherwise noted) 1 . table 2. parameter test conditions/comments min typ max unit dynamic performance ?3 db bandwidth v out = 0.1 v p-p 60 mhz 0.1 db flatness v out = 0.1 v p-p 4.8 mhz large signal bandwidth v out = 2.0 v p-p 14 mhz slew rate v out = 2.0 v p-p 53 v/s noise/distortion performance distortion (worst harmonic) f c = 100 khz, v out = 2 v p-p, g = +2 ?98 dbc input voltage noise f = 100 khz 4.5 nv/hz input current noise f = 100 khz 1.5 pa/hz dc performance input offset voltage 1.0 2.4 mv t min ? t max 2.5 mv input offset voltage match 1.0 2.0 mv input bias current 200 900 na t min ? t max 1.3 a input offset current 50 300 na open-loop gain v out = 1.0 v 85 90 db input characteristics input resistance f = 100 khz 87 k input capacitance 1.4 pf common-mode rejection v cm = 1 v ?76 ?80 db output characteristics output resistance 0.2 +swing r load = 25 +2.37 +2.42 v p ?swing r load = 25 ?2.37 ?2.32 v p +swing r load = 100 +2.45 +2.48 v p ?swing r load = 100 ?2.46 ?2.42 v p peak ac output current 2 sfdr ?70 dbc, f = 100 khz, v out = 1.0 v p , r load = 4.3 230 ma power supply operating range (dual supply) 1.5 12.6 v supply current 7 9 12 ma/amp power supply rejection v s = 0.5 v ?75 ?85 db 1 unity gain used to facilitate characterization. to imp rove stability, a gain of 2 or greater is recommended. 2 peak ac output current specificatio n assumes normal ac operation and is not valid for continuous dc operation.
ad8397 rev. a | page 5 of 16 v s = 5 v or +10 v (at t a = 25c, g = +1, r l = 25 , unless otherwise noted) 1 . table 3. parameter test conditions/comments min typ max unit dynamic performance ?3 db bandwidth v out = 0.1 v p-p 66 mhz 0.1 db flatness v out = 0.1 v p-p 6.5 mhz large signal bandwidth v out = 2.0 v p-p 14 mhz slew rate v out = 4.0 v p-p 53 v/s noise/distortion performance distortion (worst harmonic) f c = 100 khz, v out = 6 v p-p, g = +2 ?94 dbc input voltage noise f = 100 khz 4.5 nv/hz input current noise f = 100 khz 1.5 pa/hz dc performance input offset voltage 1.0 2.5 mv t min ? t max 2.5 mv input offset voltage match 1.0 2.0 mv input bias current 200 900 na t min ? t max 1.3 a input offset current 50 300 na open-loop gain v out = 2.0 v 85 94 db input characteristics input resistance f = 100 khz 87 k input capacitance 1.4 pf common-mode rejection v cm = 1 v ?84 ?94 db output characteristics output resistance 0.2 +swing r load = 25 +4.7 +4.82 v p ?swing r load = 25 ?4.74 ?4.65 v p +swing r load = 100 +4.92 +4.96 v p ?swing r load = 100 ?4.92 ?4.88 v p peak ac output current 2 sfdr ?80 dbc, f = 100 khz, v out = 3 v p , r load = 12 250 ma power supply operating range (dual supply) 1.5 12.6 v supply current 7 9 12 ma/amp power supply rejection v s = 0.5 v ?76 ?85 db 1 unity gain used to facilitate characterization. to imp rove stability, a gain of 2 or greater is recommended. 2 peak ac output current specificatio n assumes normal ac operation and is not valid for continuous dc operation.
ad8397 rev. a | page 6 of 16 v s = 12 v or +24 v (at t a = 25c, g = +1, r l = 25 , unless otherwise noted) 1 . table 4. parameter test conditions/comments min typ max unit dynamic performance ?3 db bandwidth v out = 0.1 v p-p 69 mhz 0.1 db flatness v out = 0.1 v p-p 7.6 mhz large signal bandwidth v out = 2.0 v p-p 14 mhz slew rate v out = 4.0 v p-p 53 v/s noise/distortion performance distortion (worst harmonic) f c = 100 khz, v out = 20 v p-p, g = +5 ?84 dbc input voltage noise f = 100 khz 4.5 nv/hz input current noise f = 100 khz 1.5 pa/hz dc performance input offset voltage 1.0 3.0 mv t min ? t max 2.5 mv input offset voltage match 1.0 2.0 mv input bias current 200 900 na t min ? t max 1.3 a input offset current 50 300 na open-loop gain v out = 3.0 v 90 96 db input characteristics input resistance f = 100 khz 87 k input capacitance 1.4 pf common-mode rejection ?v cm = 1 v ?85 ?96 db output characteristics output resistance 0.2 +swing r load = 100 +11.82 +11.89 v p ?swing r load = 100 ?11.83 ?11.77 v p peak ac output current 2 sfdr ?80 dbc, f = 100 khz, v out = 10 v p , r load = 32 310 ma power supply operating range (dual supply) 1.5 12.6 v supply current 8.5 11 15 ma/amp power supply rejection ?v s = 0.5 v ?76 ?86 db 1 unity gain used to facilitate characterization. to imp rove stability, a gain of 2 or greater is recommended. 2 peak ac output current specificatio n assumes normal ac operation and is not valid for continuous dc operation.
ad8397 rev. a | page 7 of 16 absolute maximum ratings table 5. parameter rating supply voltage 26.4 v power dissipation 1 see figure 4 storage temperature range ?65c to +125c operating temperature range ?40c to +85c lead temperature (soldering, 10 sec) 300c junction temperature 150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1 thermal resistance for standard jedec 4-layer board: 8-lead soic_n: ja = 157.6c/w 8-lead soic_n_ep: ja = 47.2c/w maximum power dissipation the maximum power that can be dissipated safely by the ad8397 is limited by the associated rise in junction temperature. the maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150c. te mporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 ?40?30?20?100 102030405060708090 05069-020 ambient temperature (c) maximum power dissipation (w) t j = 150c 8-lead soic figure 4. maximum power dissipation vs. ambient temperature esd caution
ad8397 rev. a | page 8 of 16 typical performance characteristics 100 80 60 ?100 ?80 ?60 ?40 ?20 0 20 40 0 20 40 60 80 100 120 140 160 180 200 05069-029 time (ns) output (mv) v out v in figure 5. small signal pulse response (g = +1, v s = 5 v, r l = 25 ) 5 ?1 0 1 2 3 4 0 2.01.81.61.41.21.00.80.60.40.2 05069-022 time ( s) output (v) v in v out figure 6. large signal pulse response (0 v to 4 v, v s = 5 v, r l = 25 ) 05069-004 3.0 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 6 ?2 ?1 0 1 2 3 4 5 0 40 80 120 160 200 240 280 320 360 400 time (ns) input (v) output (v) v in v out figure 7. output overdrive recovery (v s = 5 v, gain = +2, r l = 25 ) 0 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0.01 0.1 1 10 100 05069-005 frequency (mhz) cmrr (db) out 1 out 2 figure 8. common-mode rejection (cmrr) vs. frequency (v s = 5 v, r l = 25 ) 0 ?110 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0.01 0.1 1 10 100 05069-006 frequency (mhz) crosstalk (db) out 1 out 2 figure 9. output-to-output crosstalk vs. frequency (v s = 5 v, v o = 1 v p-p, r l = 25 ) 0.3 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.1 1 10 05069-007 frequency (mhz) gain (db) v o = 100mv p-p figure 10. 0.1 db flatness (v s = 5 v, v o = 0.1 v p-p, gain = +1, r l = 25 )
ad8397 rev. a | page 9 of 16 10 ?40 ?30 ?20 ?10 0 0.01 100 10 1 0.1 05069-008 frequency (mhz) normalized gain (db) g = +10 g = +2 g = +1 figure 11. small signal frequency response for various gains (v s = 5 v, v o = 0.1 v p-p, r l = 25 ) 10 ?40 ?30 ?10 0 ?20 0.01 100 10 1 0.1 05069-009 frequency (mhz) gain (db) 12v 5v 2.5v figure 12. small signal frequency response for various supplies (gain = +1, v o = 0.1 v p-p, r l = 25 ) 100 ?40 ?20 0 20 40 60 80 135 ?180 ?135 ?90 ?45 0 45 90 0.001 0.01 0.1 1 10 100 1000 05069-010 frequency (mhz) open-loop gain (db) phase (degrees) phase gain figure 13. open loop gain and phase vs. frequency (v s = 5 v, r l = 25 ) 10 ?40 ?30 ?20 ?10 0 0.01 0.1 1 10 100 05069-011 frequency (mhz) normalized gain (db) g = +10 g = +2 g = +1 figure 14. large signal frequency response for various gains (v s = 5 v, v o = 2 v p-p, r l = 25 ) 20 ?40 ?30 ?20 ?10 0 10 0.01 0.1 1 10 100 05069-012 frequency (mhz) gain (db) 12v 5v 2.5v figure 15. large signal frequenc y response for various supplies (gain = +1, v o = 2 v p-p, r l = 25 ) ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 0.01 0.1 1 frequency (mhz) 10 100 05069-013 psrr (db) +psrr ?psrr figure 16. power supply rejectio n ratio (psrr) vs. frequency (v s = 5 v, r l = 25 )
ad8397 rev. a | page 10 of 16 0 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0.01 10 1 0.1 05069-023 frequency (mhz) distortion (dbc) second harmonic third harmonic figure 17. distortion vs. frequency (v s = 5 v, v o = 2 v p-p, g = +2, r l = 25 ) ?40 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 05069-024 output voltage (v p-p) distortion (dbc) second harmonic third harmonic figure 18. distortion vs. output voltage @ 100 khz, (v s = 1.5 v, g = +2, r l = 25 ) ?40 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 05069-025 output voltage (v p-p) distortion (dbc) second harmonic third harmonic figure 19. distortion vs. output voltage @ 100 khz, (v s = 2.5 v, g = +2, r l = 25 ) ?40 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 012345678910 05069-026 output voltage (v p-p) distortion (dbc) second harmonic third harmonic figure 20. distortion vs. output voltage @ 100 khz, (v s = 5 v, g = +2, r l = 25 ) ?40 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 0 2 4 6 8 10 12 14 16 18 20 22 24 05069-027 output voltage (v p-p) distortion (dbc) second harmonic third harmonic figure 21. distortion vs. output voltage @ 100 khz, (v s = 12 v, g = +5, r l = 50 )
ad8397 rev. a | page 11 of 16 applications information the ad8397 is a voltage feedback operational amplifier that features an h-bridge input stage and common-emitter, rail-to-rail output stage. the ad8397 can operate from a wide supply range, 1.5 v to 12 v. when driving light loads, the rail-to-rail output is capable of swinging to within 0.2 v of either rail. the output can also deliver high linear output current when driving heavy loads, up to 310 ma into 32 while maintaining ?80 dbc sfdr. the ad8397 is fabricated on analog devices proprietary xfcb-hv. power supply and decoupling the ad8397 can be powered with a good quality, well-regulated, low noise supply from 1.5 v to 12 v. pay careful attention to decoupling the power supply. use high quality capacitors with low equivalent series resistance (esr), such as multilayer ceramic capacitors (mlccs), to minimize the supply voltage ripple and power dissipation. locate a 0.1 f mlcc decoupling capacitor(s) no more than 1/8 inch away from the power supply pin(s). a large tantalum 10 f to 47 f capacitor is recommended to provide good decoupling for lower frequency signals and to supply current for fast, large signal changes at the ad8397 outputs. layout considerations as with all high speed applications, pay careful attention to printed circuit board (pcb) layout to prevent associated board parasitics from becoming problematic. the pcb should have a low impedance return path (or ground) to the supply. removing the ground plane from all layers in the immediate area of the amplifier helps to reduce stray capacitances. the signal routing should be short and direct in order to minimize the parasitic inductance and capacitance associated with these traces. locate termination resistors and loads as close as possible to their respective inputs and outputs. keep input traces as far apart as possible from the output traces to minimize coupling (crosstalk) though the board. when the ad8397 is configured as a differential driver, as in some line driving applications, provide a symmetrical layout to the extent possible in order to maximize balanced performance. when running differential signals over a long distance, the traces on the pcb should be close together or any differential wiring should be twisted together to minimize the area of the inductive loop that is formed. this reduces the radiated energy and makes the circuit less susceptible to rf interference. adherence to stripline design techniques for long signal traces (greater than approximately 1 inch) is recommended. unity-gain output swing when operating the ad8397 in a unity-gain configuration, the output does not swing to the rails and is constrained by the h-bridge input. this can be seen by comparing the output overdrive recovery in figure 7 and the input overdrive recovery in figure 22 . to avoid overdriving the input and to realize the full swing afforded by the rail-to-rail output stage, use the amplifier in a gain of two or greater. 05069-028 input output 7 ?1 0 1 0 80 160 240 320 400 time (ns) 480 560 640 720 800 2 3 4 5 6 volts figure 22. unity-gain input overdrive recovery
ad8397 rev. a | page 12 of 16 capacitive load drive when driving capacitive loads, many high speed operational amplifiers exhibit peaking in their frequency response. in a gain-of-two circuit, figure 23 shows that the ad8397 can drive capacitive loads up to 270 pf with only 3 db of peaking. for amplifiers with more limited capacitive load drive, a small series resistor (r s ) is generally used between the amplifier output and the capacitive load in order to minimize peaking and ensure device stability. figure 24 shows that the use of a 2.2 series resistor can further extend the capacitive load drive of the ad8397 out to 470 pf, while keeping the frequency response peaking to within 3 db. 5 0 ?5 ?10 ?15 ?20 ?25 ?30 ?35 ?40 0.01 0.1 1 10 100 05069-021 frequency (mhz) gain (db) 220pf 100pf 270pf 150pf figure 23. capacitive load peaking without series resistor 5 0 ?5 ?10 ?15 ?20 ?25 ?30 ?35 ?40 0.01 0.1 1 10 100 05069-030 frequency (mhz) gain (db) 470pf 390pf 330pf 270pf figure 24. capacitive load peaking with 2.2 series resistor
ad8397 rev. a | page 13 of 16 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 25. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) compliant to jedec standards ms-012-a a controlling dimensions are in millimeter; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.050) 0.40 (0.016) 0.50 (0.020) 0.25 (0.010) 45 8 0 1.75 (0.069) 1.35 (0.053) 1.65 (0.065) 1.25 (0.049) seating plane 85 4 1 5.00 (0.197) 4.90 (0.193) 4.80 (0.189) 4.00 (0.157) 3.90 (0.154) 3.80 (0.150) 1.27 (0.05) bsc 6.20 (0.244) 6.00 (0.236) 5.80 (0.228) 0.51 (0.020) 0.31 (0.012) coplanarity 0.10 top view 3.098 (0.122) bottom view (pins up) 2.41 (0.095) 0.10 (0.004) max for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 07-28-2008-a figure 26. 8-lead standard small outlin e package with exposed pad [soic_n_ep] narrow body (rd-8-2) dimensions shown in millimeters and (inches) ordering guide model 1 temperature package package description package outline ad8397arz ?40c to +85c 8-lead soic_n r-8 ad8397arz-reel ?40c to +85c 8-lead soic_n r-8 ad8397arz-reel7 ?40c to +85c 8-lead soic_n r-8 AD8397ARDZ ?40c to +85c 8-lead soic_n_ep rd-8-2 AD8397ARDZ-reel ?40c to +85c 8-lead soic_n_ep rd-8-2 AD8397ARDZ-reel7 ?40c to +85c 8-lead soic_n_ep rd-8-2 1 z = rohs compliant part.
ad8397 rev. a | page 14 of 16 notes
ad8397 rev. a | page 15 of 16 notes
ad8397 rev. a | page 16 of 16 notes ?2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d05069-0-5/11(a)

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